What changed
Google has added two new TPU chips to its eighth-generation lineup: TPU 8tx and TPU 8i Max. TPU 8tx is designed for secure, hardware-isolated inference, while TPU 8i Max combines two TPU 8i chips into a single package to support long-context agentic workloads.
What this means in practice
TPU 8tx replaces the Arm-based Axion hosts of previous models with a 5th Gen AMD EPYC CPU and uses the Boardfly network. It is intended for regulated enterprises and governments requiring secure inference and confidential processing. TPU 8i Max doubles the compute, SRAM, and HBM bandwidth of the original TPU 8i, offering about 20.2 FP4 PFLOPS, 768 MB SRAM, and 17.2 TB/s H, which Google claims provides more compute per square foot and per watt.
The TPU 8i Max is aimed at long-context workloads, such as those involving large models targeting 1 million tokens. The increased memory bandwidth helps manage larger context windows and KV caches, which are critical for maintaining performance in complex agentic tasks.
Google also introduced TPU Sync, an open-source tool that moves KV caches off-chip to host DRAM and shared storage, reducing transfer latency by more than 90%.
Limitations and availability
The TPU 8tx and TPU 8i Max are listed as "coming soon" on Google’s Cloud TPU page, with no availability date or pricing provided. The supplied announcement does not specify HBM capacity, pod sizes, or customer details for either system. Additionally, details on attestation, the ability for customers to verify confidentiality, are missing for the TPU 8tx. The TPU 8tx is intended for environments where security and confidentiality are critical, such as regulated enterprises and governments, but no specific use cases or customers are mentioned.
